{"id":26593,"date":"2023-07-17T20:30:05","date_gmt":"2023-07-17T20:30:05","guid":{"rendered":"https:\/\/training.linuxfoundation.org\/?post_type=product&p=26593"},"modified":"2025-06-18T19:01:41","modified_gmt":"2025-06-18T19:01:41","slug":"computer-architecture-with-an-industrial-riscv-core-rvfpga-lfd119x","status":"publish","type":"product","link":"https:\/\/training.linuxfoundation.org\/ja\/training\/computer-architecture-with-an-industrial-riscv-core-rvfpga-lfd119x\/","title":{"rendered":"Computer Architecture with an Industrial RISC-V Core [RVfpga] (LFD119x)"},"content":{"rendered":"\n\t\t
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\n \n\t\t \n\t\t Training Course<\/span>\n <\/div>\n<\/div>\n

Computer Architecture with an Industrial RISC-V Core [RVfpga] (LFD119x)<\/H1><\/div>\n
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RISC-V, an open-standard computer architecture, is transforming processor design and software\/hardware co-design, including enabling open source hardware implementations. This means that software development can occur alongside hardware development, accelerating the design process. Enroll today to develop your understanding of the RISC-V architecture and its ecosystem and get familiar with the RISC-V cores and system-on-chip.<\/span><\/p>\n<\/div>\n\n\n\n\n\t\t\t<\/div> \n\t\t<\/div>\n\t<\/div> \n\n\t

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Who Is It For<\/div>\n
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This course is for junior level or higher university computer science, electrical and computer engineers and other technical students as well as others who would like to learn and experiment with RISC-V.<\/div>\n \n read less<\/span>\n read more<\/span>\n <\/a>\n <\/div>\n\n <\/section>\n\t
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What You\u2019ll Learn<\/div>\n
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The course provides hands-on experience with RISC-V computer architecture and teaches how to develop and compile C and RISC-V assembly code for the RVFpga SoC as well as how to use and extend the input\/output system of the RVfpga SoC. Additionally, you will learn how to configure the microarchitecture of the VeeR EH1 CoreTM and test its different features using performance counters and industry-standard benchmarks. Finally, the course provides step-by-step instructions on how to execute programs on the Nexys A7 board and simulate programs using: Whisper instruction set simulator (ISS); Verilator-based RVfpga-ViDBo; RVfpga-Pipeline; and RVfpga-Trace.<\/div>\n \n read less<\/span>\n read more<\/span>\n <\/a>\n <\/div>\n\n <\/section>\n\t
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What It Prepares You For<\/div>\n
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Upon completion, learners should be able to use RISC-V to improve security, power consumption and performance of processors and help shape the future of computer architecture.<\/div>\n \n read less<\/span>\n read more<\/span>\n <\/a>\n <\/div>\n\n <\/section>\n\t<\/div>\n
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\n Course Outline<\/span>\n\t\t <\/section>\n
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\n \n Welcome to LFD119x!<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 1. Installation and Initial Demonstrations<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 2. C Programming with the RVfpga SoC<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 3. RISC-V Assembly Programming with the RVfpga SoC<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 4. RISC-V Function Calls<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 5. Mixing C and Assembly Functions in a Program<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 6. Introduction to Peripherals and Input\/Output<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 7. More I\/O: 7-Segment Displays<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 8. More I\/O: Timers<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 9. Interrupts<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Chapter 10. Delving Deeper into the RISC-V VeeR Core<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t
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\n \n Final Exam (verified track only)<\/span>\n <\/span>\n <\/section>\n <\/article>\n\t\t\t\t\t\t <\/section>\n
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