Training > Embedded Development > Introduction to RISC-V (LFD110x)
Training Course

Introduction to RISC-V (LFD110x)

RISC-V is a free and open instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. This course will guide you through the various aspects of understanding the RISC-V community ecosystem, RISC-V International, the RISC-V specifications and how to help curate and develop them, and the technical aspects of working with RISC-V both as a developer and end-user.

Course Rating
3.7/5 Stars
Who Is It For

This course is designed for RISC-V enthusiasts, hardware nerds, and anyone else interested in the details of how an open source ISA is breaking down barriers and opening up new opportunities in the microprocessor world.
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What You’ll Learn

In this course, you will learn about the nature, history, ongoing practices and other fundamentals of RISC-V as a technology, an international organization, and a community of developers and implementers. You will also see how RISC-V technical working groups are organized, as well as explore the basis of community-based open specification development, and how the RISC-V ISA is developed as an open specification. Moreover, you will learn how people and organizations can benefit from and contribute to RISC-V, and will be able to put the RISC-V ISA into action with a simulator booting the Linux operating system.
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What It Prepares You For

This course contains a high level overview of RISC-V International as well as how to get started working with the RISC-V ISA. The course gives you the foundation of knowledge you need to effectively engage in the RISC-V community, contribute to the ISA specifications, or to develop the wide range of RISC-V software projects. After completing this course you will have a better understanding of the terminology, resources, and workflow you will need to complete your RISC-V journey.
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Course Outline
Chapter 1. Getting to Know RISC-V
Chapter 2. The RISC-V Story
Chapter 3. The RISC-V Community
Chapter 4. Developing RISC-V
Chapter 5. RISC-V in Practice
Final Exam (verified track only)

There are no specific prerequisites, although a solid grounding in computer architecture will help greatly, especially in chapters 4 and 5.
Dec 2022
This course is very well structured, like a roadmap in a simple way, and gives good references.
Nov 2022
I liked everything, great course with a ton of relevant information, but on the other hand not overwhelming - really up to the point. I really appreciate also giving links and directions to other material. I think this has saved me weeks, should I have tried to find all these things myself.
Nov 2022
Contained a good balance of RISC-V technical and organizational material. Instilled the idea that RISC-V is truly an "open-specification", and effectively presented the governance model.
Aug 2022
A very good course / introduction to RISC-V Echo System, and basic technical areas that differentiate.
Aug 2022
Good introduction, gets one started, and makes what is unfamiliar familiar.