Certification > IoT & Embedded Development > RISC-V Foundational Associate (RVFA)

RISC-V Foundational Associate (RVFA)

The RVFA exam demonstrates an individual possesses the fundamental, entry-level knowledge and skills required of RISC-V hardware and software professionals.

POLICY CHANGE: As previously stated, please be reminded that our Certification Period Policy changed as of April 01, 2024, 00:00 UTC. Certifications achieved on or after this date will expire 24 months from the date the program certification requirements, including passing the exam, are met. Please see additional details here.

Who Is It For

The (RVFA) certification is intended for those interested in an entry-level RISC-V role or transitioning from another architecture.
The certification is ideal for those pursuing a career in roles such as Embedded Engineer, RTL Design Engineer, Design Verification Engineer, Software Developer (specifically Device Driver, Kernel, and Toolchain), or Documentation Engineer.
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About This Certification

A candidate looking to begin preparations for the RVFA certification should already have familiarity with Git, High-Level Programming Languages (C), Debuggers (GDB), and System Architecture.
An RVFA candidate will have programming or design experience and may have completed computer science, software engineering, computer engineering, or electrical engineering coursework.
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What It Demonstrates

An RVFA will have demonstrated skills and knowledge relating to the RISC-V ISA (Instruction Set Architecture), including basic architecture and terminology. In addition, an RVFA candidate understands Embedded Hardware Design, including Internet of Things (IoT), industrial, medical, and automotive applications.

RVFA certificate holders have demonstrated the ability to write, debug, optimize, and compile code in RISC-V Assembly Language, as well as the ability to use toolchains (GCC, LLVM) and understand RISC-V calling conventions.

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Domains & Competencies
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RISC-V Overview10%
History of RISC-V: The Free and Open ISA
RISC-V International
RISC-V Documentation
Contribute to RISC-V
RISC-V Instruction Set Architecture35%
RV32I and RV64I
Understand Instruction Formats: branching, accessing memory, and accessing data structures
Understand the modularity of RISC-V as an ISA: core ratified (M, C, F, D, A) and other extensions
Understand Privilege Modes, system calls, CSRs, exceptions, and interrupt handling
Understand memory model, cache management, and virtual memory management
Assembly Language for RISC-V25%
Understand RISC-V specific assembly language syntax and features, including CSR access
Write and debug RISC-V assembly code
Assess performance of assembly code
Convert high-level code to assembly code
High Level Languages for RISC-V: C Programming15%
Understand RISC-V tools including compilers, debuggers, simulators, performance tools, OSes, and SDKs
Understand calling conventions (ABIs), the stack, and disassembly
Understand inline assembly
RISC-V Operating Systems & Tools15%
Fundamentals of Operating Systems including implementing basic OS functionality in RISC-V ASM
Understanding basic use and functionality of firmware for RISC-V platforms
Understanding microcontrollers versus application processors
Running RISC-V Applications in a General Purpose OS

There are no pre-requisites for this exam.